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1 features ? full field image sensor 3500 x 2300 pixels ? pixel 10 m x 10 m photo-mos with 100% aperture ? image zone: 35 mm x 23 mm ? frame readout through one, two or four outputs ? built-in region of interest structure ? data rates up to 4 x 25 mhz (compatibility with 10 frames/seconds) ? high dynamic range (up to 3000), at room temperature and at 25 mhz frequency ? very low dark current (mpp mode) ? optimized resolution and responsivity in the 400 - 1100 nm spectrum ? additional full-frame operating modes ? 2627 x 2300 pixels of 10 m x 10 m (3 zones) ? binning 4 x 4 pixels (format 875 x 575 pixels of 40 m x 40 m) ? binning 2 x 2 pixels (format 1750 x 1150 pixels of 20 m x 20 m) ? on-request frame transfer architecture ? 1750 active lines, one memory zone with frame readout through one or two outputs ? 1750 active lines, two memories zones with frame readout through two or four outputs ? flexibility and performance make device suitable for digital photography, graphic arts, medical and industrial applications description atmel?s AT71200M is a full-frame sens or based on charge-co upled device (ccd) technology. it can be used in a wide range of applications thanks to operating mode flexibility, very high definition and high dynamic range. the nominal photosensitive area is made up of 2300 x 3500 useful pixels and is split into four independent zones that are driven separately by four independant four-phase clocksets. thus the sensor can be used in up to 15 main modes. the large format and high definition make the device suitable for any application requiring precision and accuracy. the high sensitivity of the 10 m x 10 m pixels with 100% aperture provides a large bandwidth of response with up to 1100 nm wavelength. two serial registers and four independent output amplifiers offer a high-frequency functionality of up to 17 frames per second and a 12-bit dynamic range. 8m-pixel image sensor AT71200M rev. 2134a?image?02/03
2 AT71200M 2134a?image?02/03 pinout figure 1. AT71200M pinout 19 18 17 16 15 14 6 5 4 3 2 1 register a zone a zone b zone c zone d register b vos3 vos4 vos1 vos2 p n m l k j h g f e d c b a vdd1 vs1 vgs1 s1 lb4 lb1 vss vss lb5 lb8 s2 vgs2 vs2 vdd2 vos1 vdr1 vgl1 r1 lb3 lb2 vss lb7 lb6 r2 vgl2 vdr2 vos2 vss vss vss vss vss1 vss vss vss vss vss vss vss vdeb vfcb tb fcb pd2 pd3 pc3 pc2 pc4 pc1 pd1 pd4 pb1 pb2 pa2 pa1 pb4 pb3 pa3 pa4 vdd3 vs3 vgs3 s3 la8 la5 la1 la4 s4 vdd4 vs4 vgs4 vos3 vdr3 vgl3 r3 la6 la7 r4 la3 la2 vos4 vdr4 vgl4 vdea fca ta vss1 vfca
3 AT71200M 2134a?image?02/03 table 1. AT71200M pinout signal name pin number function lb[1:8] f1, f2, g2, e1, j1, j2, h2, k1 b readout register clocks la[1:8] j19, j18, h18, k19, f19, f18, g18, e19 a readout register clocks s[1:4] d1, l1, d19, l19 summing clocks of the outputs 1, 2, 3 and 4 vgl[1:4] c2, m2, c18, m18 readout gate bias of the outputs 1, 2, 3 and 4 vgs[1:4] c1, m1, c19, m19 output gate bias of the outputs 1, 2, 3 and 4 vos[1:4] a2, p2, a18, p18 output video signals 1, 2, 3 and 4 vdd[1:4] a1, p1, a19, p19 output amplifier drain supplies of the outputs 1, 2, 3 and 4 vs[1:4] b1, n1, b19, n19 output amplifier source biases of the outputs 1, 2, 3 and 4 r[1:4] d2, l2, d18, l18 reset clocks of the outputs 1, 2, 3 and 4 vdr[1:4] b2, n2, b18, n18 reset bias of the outputs 1, 2, 3 and 4 pa[1:4] p14, n14, n15, p15 a image zone clocks pb[1:4] a14, b14, b15, a15 b image zone clocks pc[1:4] p6, p5, n5, n6 c image zone clocks pd[1:4] a6, a5, b5, b6 d image zone clocks ta, tb b16, n4 transfer gates from the image zone to the readout registers a and b respectively vdea, vdeb a17, p3 shield drains vfca, vfcb p16, a4 region of interest drains fca, fcb a16, p4 region of interest clocks vss a3, b3, b4, e2, g1, h1, k2, m3, b17, e18, g19, h19, k18, n16, n17, p17 substrate bias
4 AT71200M 2134a?image?02/03 block diagram figure 2. AT71200M block diagram ? top view uni- or bi-directional readout register a 873 lines - zone a 877 lines - zone b full-field image sensor 3500 x 2300 active pixels 877 lines - zone c 873 lines - zone d uni- or bi-directional readout register b lai (i = 1 to 8) 2-phase horizontal clocks 12 pre-scan elements v os3 12 4 dummy lines (photosensitive) 16 dark references (100% black) 8 insulating columns (photosensitive) 4 dummy lines (photosensitive) v os1 12 first useful pixel on v os1 output pai (i = 1 to 4) vertical clocks pci (i = 1 to 4) vertical clocks pbi (i = 1 to 4) vertical clocks pdi (i = 1 to 4) vertical clocks lbi (i = 1 to 8) 2-phase horizontal clocks fast clear structure ( fcb , v fcb ) 16 dark references (100% black) 12 12 v os2 v os4 fast clear structure ( fca , v fca ) 8 insulating columns (photosensitive)
5 AT71200M 2134a?image?02/03 architectural overview general parameters note: 1. the design allows the full frame to be read through one, two or four outputs. table 2. general parameters parameters value pixel size 10 m x 10 m number of useful pixels on one line 2300 number of useful lines 3500 number of readout register 2 number of outputs 4 (1) mpp technology yes region of interest structures on readout registers yes built-in antiblooming no pixel mode 4-phase readout register mode 2-phase
6 AT71200M 2134a?image?02/03 vertical characteristics ? top to bottom AT71200M is made up of four zones, a, b, c and d. the configuration of each zone is shown in table 3. horizontal characteristics table 4 gives information on the characteristics seen by one output (v os1 , v os2 , v os3 or v os4 ) in different readout modes. output amplifiers the charge packets are clocked to the out put nodes and the charges are converted to voltages. the potential at the output node is read through two stage source follower amplifiers. refer to figure 3. figure 3. on-chip output amplifier structure table 3. vertical characteristics zone configuration a 4 dummy photosensitive lines 873 active lines, 100% photosensitive b 877 active lines, 100% photosensitive c 877 active lines, 100% photosensitive d 873 active lines, 100% photosensitive 4 dummy photosensitive lines table 4. horizontal characteristics and readout modes characteristic readout mode one output two outputs on same register pre-scan elements 12 12 dark references 16 16 insulating elements 8 8 useful pixels 2300 1150 output node vdd vs
7 AT71200M 2134a?image?02/03 note: 1. if not specified, all voltages are applied with respect to the substrate vss. absolute maximum ratings* storage temperature range ......................... -55c to +150c operating temperature range........................ -40c to +85c thermal cycling..........................................................15c/mn *notice: stresses above those listed under absolute maximum ratings may cause permanent device failure. functionality at or above these limits is not implied. exposure to absolute maximum ratings for extended periods may affect device reliabil- ity. electrical limits of applied signals are given in table 5. shorting the video output to v ss or v dd , even temporarily, can permanently damage the output amplifier. due to mpp mode or negative voltages, image zone gates and region of interest gates do not include esd protection. to avoid degradation, the devices (including pins and package) should be handled with a grounded bracelet and stored on conductive layer used for shipment. table 5. maximum applied voltages (1) signal name parameter min max unit la[1:8] readout a register clocks -0.3 +15 v lb[1:8] readout b register clocks -0.3 +15 v s[1:4] summing gate -0.3 +15 v vgl[1:4] readout gate -0.3 +15 v vgs[1:4] output gate -0.3 +15 v vos[1:4] output video signal -0.3 +15 v vdd[1:4] amplifier drain supply -0.3 +15 v vs[1:4] source bias -0.3 +15 v r[1:4] reset gate -0.3 +15 v vdr[1:4] reset bias -0.3 +15 v pa[1:4] image zone a clocks -15 and pa[other] - 20 +15 and pa[other] + 20 v pb[1:4] image zone b clocks -15 and pb[other] - 20 +15 and pb[other] + 20 v pc[1:4] image zone c clocks -15 and pc[other] - 20 +15 and pc[other] + 20 v pd[1:4] image zone d clocks -15 and pd[other] - 20 +15 and pd[other]+20 v ta transfer gates zone a la - 15 and pa[4] - 15 +15 and pa[4] + 15 v tb transfer gates zone b lb - 15 and pd[4 ] - 15 +15 and pd[4] +15 v vdea, vdeb shield drains -0.3 +15 v vfca, vfcb region of interest drains -0.3 +15 v fca region of interest gateszone a la[1:8] - 15 +15 v fcb region of interest gates zone b lb[1:8] - 15 +15 v vss substrate bias 0v
8 AT71200M 2134a?image?02/03 note: 1. if corresponds to inactive output, may be stated to [3v, 7v] in order to reduce power consumption. dc characteristics symbol parameter minimum typical maximum unit typical currents v s (1) source bias 0 0 1 v <12 ma v dd (1) amplifier drain supply 14.5 15 15.5 v <12 ma v ss substrate bias 0 0 v ? v gs output gate 7 7.5 8 v <1 a v dr reset diode 13.5 14 14.5 v <5 a v gl readout gate 3 3.5 4 v <1 a readout gate - binning mode 11 12 13 v <1 a v de shield drain 3 5 6 v <1 a vfc region of interest drains 12.5 13 13.5 v <5 a
9 AT71200M 2134a?image?02/03 notes: 1. i = a, b, c or d 2. j = 1, 2, 3 or 4 3. m = a or b 4. n = 1, 2, 3, 4, 5, 6, 7 or 8 drive clock characteristics symbol parameter state minimum typical maximum unit remarks pij (1)(2) image zone clocks low -10 -9 -8 v for each a, b, c and d zone, the typical capacitances to drive are c pij approx. 12 nf high +2.5 +3 +3.5 v lmn (3)(4) readout register clocks low 0 0 +0.5 v after the eight clocks have been grouped together to form the two clocks l1 and l2 , the typical capacitances to drive for each register a or b are c l1 approx. 310 pf and c l2 approx. 310 pf high +7.5 +8 +9 v sj (2) summing gates low 0 0 +0.5 v for each sj , the typical capacitances to drive is c sj approx. 40 pf high +7.5 +8 +9 v rj (2) reset gates low +1 +2 +3 v for each rj , the typical capacitance to drive is c rj approx. 40 pf high +8 +9 +10 v tm (3) transfer gates low -6 -5 -4 v for each tm , the typical capacitance to drive is c tm approx. 150 pf high +2.5 +3 +3.5 v fcm (3) region of interest gates fc inactive -3.5 -2.5 -2 v for each fcm , the typical capacitance to drive is c fcm approx. 50 pf low 0 0 +0.5 v high +3.5 +4 +4.5 v
10 AT71200M 2134a?image?02/03 operating modes for the required readout mode, the vertical and horizontal clocks must be tied together externally as shown in figure 4. figure 4. operating modes note: symbols a, b, c and d correspond to the clocks described in the full-frame mode timing diagrams and the symbols ma, mb, mc and md correspond to the clocks described in the frame transfer mode timing diagrams. abbreviations nbv and nbh correspond respectively to the vertical and horizontal number of transfers. the unused horizontal clocks ( l, r, s) must be stated to higher level of l. vertical trans f er 3508 transfers min nbv=3508 3508 transfers min nbv=3508 1754 transfers min nbv=1754 2631 transfers min nbv=2631 877 transfers min nbv=877 1- 2 -3 modes pa1= pb1= pc1= pd1= a pa 2 = pb 2 = pc 2 = pd 2 = b pa 3 = pb 3 = pc 3 = pd 3 = c pa 4 = pb 4 = pc 4 = pd 4 = d ta = low level tb = a 4-5-6 modes pa1= pb1= pc1= pd1= a pa 2 = pb 2 = pc 2 = pd 2 = d pa 3 = pb 3 = pc 3 = pd 3 = c pa 4 = pb 4 = pc 4 = pd 4 = b ta = a tb = low level 7-8-9 modes pa1= pb1= pc1= pd1= a pa 4 = pb 4 = pc 2 = pd 2 = b pa 3 = pb 3 = pc 3 = pd 3 = c pa 2 = pb 2 = pc 4 = pd 4 = d ta = a tb = a 10-11-12 modes pa1= pb1= pc1= pd1= a pa 4 = pb 2 = pc 2 = pd 2 = b pa 3 = pb 3 = pc 3 = pd 3 = c pa 2 = pb 4 = pc 4 = pd 4 = d ta = a tb = a 16-17-18 modes pa1= pd1= ? a pc1= pb1= pa pa4= pd2= ? b pc2= pb4= pb pa3= pd3= ? c pc3= pb3= pc pa2= pd4= ? d pc4= pb2= pd ta = tb = ? a 3 inactive 4 3 4 3 4 3 4 3 4 2336 pixels periods nbh=2336 mode1 mode4 mode7 mode10 mode16 1 2 1 inactive 2 1 2 1 2 1 2 4-7-10-13-16 modes la1= la3= la5= la8= l1 la2= la4= la6= la7= l2 1-7-10-16 modes lb1= lb4= lb5= lb7= l1 lb2= lb3= lb6= lb8= l2 3 inactive 4 3 4 3 4 3 4 3 4 2336 pixels periods nbh=2336 mode2 mode5 mode8 mode11 mode17 1 2 1 inactive 2 1 2 1 2 1 2 5-8-11-14-17 modes la1= la4= la5= la7= l1 la2= la3= la6= la8= l2 2-8-11-14-17 modes lb1= lb3= lb5= lb8= l1 lb2= lb4= lb6= lb7= l2 3 inactive 4 3 4 3 4 3 4 3 4 1186 pixels periods nbh=1186 mode3 mode6 mode9 mode12 mode18 1 2 1 inactive 2 1 2 1 2 1 2 6-9-12-15-18 modes la1= la4= la5= la8= l1 la2= la3= la6= la7= l2 3-9-12-18 modes lb1= lb4= lb5= lb8= l1 lb2= lb3= lb7= lb6= l2 horizontal transfer
11 AT71200M 2134a?image?02/03 timing diagrams figure 5. full-frame mode timing diagram note: a, b, c, d, l1 and l2 (command phases) and nbv, nbh (number of vertical transfer and number of horizontal trans- fer respectively) are defined in figure 4. a c b l1 r l2 d ... ... ... ... ... ... ... ... nbv pulses cleaning integration time readout time 1234 nbv see expanded view in fig. 6 nbh pulses cleaning
12 AT71200M 2134a?image?02/03 figure 6. line timing diagram note: k = p, m t o = see table 9 9 t 0 t 0 t 0 11 t 0 ka kb kc k d l1 l2 ? first prescan
13 AT71200M 2134a?image?02/03 figure 7. two lines summation timing diagram note: k = p, m 17 t 0 19 t 0 ka r l2 l1 kd kc kb first prescan
14 AT71200M 2134a?image?02/03 figure 8. frame transfer mode timing diagram (without summation) note: a, b, c, d, l1 and l2 (command phases) and nbv, nbh (number of vertical transfer and number of horizontal trans- fer respectively) are defined in figure 4. recurrence (t i ) image to memory zone transfer 1234 12 12 1234 nbv nbv nbv nbv nbv nbv nbv nbv 1234 12 1234 nbv pulses nbv train pulses nbh pulses 123 pa ma pd pc pb l1 md mc mb r l2 storage zone cleaning
15 AT71200M 2134a?image?02/03 figure 9. p and m phases during fast image zone to memory zone transfer ? timing diagram figure 10. readout register transfer in summation mode ? timing diagram t 0 8 t 0 8 t 0 1 2 nbv - 1 nbv pa or ma pd or md pc or mc pb or mb a v os r s l2 l1 d c b 2 t t ~ 5 ns reset floating potential signal level ref.level
16 AT71200M 2134a?image?02/03 figure 11. region of interest operating mode note: typical values t a 150 ns, t b 150 ns t a t b fast clear startup 1 line clearance fast clear stop pij fci li1 li2 first following line is a dummy line t a table 6. typical tr and tf (time rise, time fall) for phases phase time p1 500 ns p2 500 ns p3 500 ns p4 500 ns fc 50 ns v fc 50 ns l1 10 ns l2 10 ns s 10 ns r 4 ns
17 AT71200M 2134a?image?02/03 frame rate characteristics note: table 7 gives typical values for full-frame mode where: ? horizontal pixel frequency = 25 mhz ? vertical transfer time t v = 11xt 0 = 10 s (delay times before and after line transfer t 1 = t 2 = t 0 ) ? integration time = 0 s note: 1. for each output. table 7. frame rate characteristics one output (modes 1, 2, 3, 4) two outputs (modes 13, 14) four outputs (mode 15) without binning typical 2.8 fps typical 5.1 fps typical 10.2 fps with 2 x 2 binning typical 5.1 fps typical 8.7 fps typical 17.3 fps table 8. electrical and miscellaneous characteristics symbol parameters minimum typical maximum unit v ref dc output level 10 v z out output impedance 230 ohms i dd (1) output amplifier supply current 10 15 ma c vf charge-to-voltage conversion factor ? standard mode 7.3 7.6 8.0 v/e- charge-to-voltage conversion factor ? binning mode 4.8 5.1 5.4 t v vertical transfer time 6 10 ? s fh maximum readout pixel frequency 25 ? ? mhz
18 AT71200M 2134a?image?02/03 electrooptical data notes: 1. measurement conditions: t c = 25 c (chip temperature) vertical transfer time: t v = 10 s readout pixel frequency: f h = 5 mhz readout through 4 outputs and standard mode 9 (see figure 4) 3200k halogen lamp with 2 mm bg38 filter at f/11 aperture 2. see additional operating modes 3. integration time ti = 10 s in darkness 4. output voltage > 10% vsat table 9. performance data (1) symbol parameters minimum typical maximum unit v sat pixel saturation output voltage 500 600 700 mv saturation output voltage in binning modes (2) 1320 1550 1780 mv r responsivity 4.3 4.9 5.5 v/(j/cm 2 ) prnu photo response non uniformity, 13% |vos| dsi1 dark signal image zone mpp mode 0.3 mv/s dsi2 dark signal image zone non-mpp mode 60 mv/s dsr dark signal readout register (non-mpp mode) 150 mv/s vds (3) average dark signal 7 20 mv dsnu (3) dark signal non-uniformity, 3.5 5.5 mv v n temporal rms noise in darkness @ bw = 150 mhz 270 v dr dynamic range 67 db linearity 1 % mtf modulated transfer function 45 % vcte (4) vertical charge transfer efficiency (per stage) 0.99995 0.999998 ? hcte (4) horizontal charge transfer efficiency (per stage) 0.99995 0.999998 ?
19 AT71200M 2134a?image?02/03 figure 12. typical spectral response 0.00 2.00 4.00 6.00 8.00 10.00 12.00 14.00 16.00 18.00 400 500 600 700 800 900 1000 1100 wavelenth (nm) responsivity v/(j/cm2)
20 AT71200M 2134a?image?02/03 image grade table 10 gives results of image grade testing. notes: 1. testing has been carried out under the following conditions: operating temperature: 25c (unless otherwise specified) illumination conditions: 3200k halogen lamp with bg38 infrared filter and f/11 aperture integration time = 10s in darkness test under illumination at 50% of saturation level standard mode, t v = 10 s, fh = 5 mhz 2. d min: minimum number of pixels separating defects in any direction. all occurences are non-contiguous. definitions table 10. image grade (1) blemishes cluster 1 cluster 2 column grade total d min (2) total d min (2) total d min (2) total d min (2) e 500 3 30 50 6100 3150 h 300 3 10 50 0 0 table 11. defect sizes type description blemish 1 x 1 defect cluster blemish grouping of not more than a given number of adjacent defects: 1 x 1 < cluster 1 size 2 x 2 2 x 2 < cluster 2 size 5 x 5 column one-pixel-wide column with more than seven contiguous defective pixels table 12. defects in darkness type description blemish/cluster pixel signal deviation of more than 200 mv from the average output signal column column signal deviation of more than 20 mv from the average output signal table 13. defects under illumination type description blemish/cluster pixel deviation of more than 20% from the average output signal column column deviation of more than 10% from the average output signal
21 AT71200M 2134a?image?02/03 package drawing 1 anti-reflective window 400-700 nm 98% min transmission 2 photosensitive area 3 z top = optical distance between top surface and 2 4 zbot = optical distance between back side and 2 5 pin a1 index mark 6 mechanical references/die positionning (first pixel) x = 7.50 0.075 4.57 0.25 z top = 1.73 +0.25 -0.41 3 2 4 zbot = 2.79 +0.22 -0.30 4.52 +0.4 -0.65 3.26 0.33 first pixel 6 2.54 typ 2.54 typ 8 x 2.54 0.46 0.05 33.02 0.40 38.0 0.38 19.5 0.1 2.0 0.1 6 50.60 0.51 38.0 0.1 y = 42.80 0.075 45.72 0.5 6 5 4 3 2 1 19 18 17 16 15 14 5 p n m l k j h g f e d c b a 1.20 all dimensions in mm +0.05 -0.30
22 AT71200M 2134a?image?02/03 ordering information figure 13. ordering information key the following part numbers are available: ? AT71200Mcrer: full frame version grade e ? AT71200Mcrhr: full frame version grade h ? AT71200Mcrerb: frame transfer version with two memories zones 1234567891011 at71200 technological variants temperature range: c: 0 c to +70 c package families: r: pin grid array (pga) image grade: e: standard h: high customer specification quality assurance level - : standard screening - : nothing b = mechanical mask e = on chip color filter package variants: n: non-sealed window r: anti-reflective window
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